Forum Discussion
Altera_Forum
Honored Contributor
16 years ago --- Quote Start --- but when I simulate it on quartus it works so perfectly.. I configured the codec for DSP mode with MSB available at the first negedge of the bclk. --- Quote End --- i have experience too when using DSP module then i got noise on DAC . My problem is resolved by synchronizing DACLRCK (i'm using slave mode) , but in my case, i'm using i2s format bit . I think you should check again on Quartus, Do ADCLRCK clock have same phase with DACLRCK? I think you should synchronize it so DACLRCK have delay as many as latency clock on your DSP module