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RVadl2's avatar
RVadl2
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Need the test code for I2C_RSU

Hi @Ana_R_Intel1 , I am trying out the I2C_RSU project in the below link using a Max 10 Development board. I understand this slave code will help in loading the 10M50 FPGA with a new image through ...
JohnT_Altera's avatar
JohnT_Altera
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


There is no setting for this as the FPGA should be able to handle the clk speed. If you are not confident then I would recommend you to implement the timing constraint to make sure it is meeting the highest frequency you are planning to used.


RVadl2's avatar
RVadl2
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

Hi,

Can you also let me know, which are the correct addresses for control register and status register for on-chip flash?

Regards,

Ravi