Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Need help running the PCIe to DDR3 SDRAM reference design

I've purchased an Altera Stratix IV GX FPGA development kit. I am trying to run the PCIe to DDR3 SDRAM reference design which I downloaded from: https://www.altera.com/support/software/download...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Hi,

I recompiled the project with the nonES device and didnt get any errors? What errors did you see?

The top level file can be seen in the quartus project, top_example_chaining_top.v