Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorNeed help running the PCIe to DDR3 SDRAM reference design
I've purchased an Altera Stratix IV GX FPGA development kit. I am trying to run the PCIe to DDR3 SDRAM reference design which I downloaded from: https://www.altera.com/support/software/download...
Altera_ForumHonored Contributor
Honored ContributorHi,
I recompiled the project with the nonES device and didnt get any errors? What errors did you see? The top level file can be seen in the quartus project, top_example_chaining_top.v
