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Altera_Forum's avatar
Altera_Forum
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16 years ago

Need help creating a simple 32bit counter

I'm trying to learn VHDL so I thought I'd try converting the "my_first_fpga" example from verilog to VHDL (how complicated can adding one to a number be?), three hours later, lots of googling and sea...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Yes, I mixed up with the way I usually do a clock, which is either 

Clockgen: process
  begin
    wait for 10ns;
    clock <= not clock;
  end process;
or
Clockgen: process
  begin
    clock <= '0';
    wait for 10ns;
    clock <= '1';
    wait for 10ns;
  end process;
The latter is longer but doesn't require to initialize the clock value