My projects don't run.

english:

I´m VHDL Learner and I have a Problem with SP (.pof)!

Under JTAG programming it works with default settings before.

Start SP loading is Ok, after that nothing works.

After loading SP , JTAG programming doesn´t work too.

Is this the same Problem or I´m stupid? ;) I Use the DE2 Board, Quartus II 9.1 und will produce a VHDL file, what is befor a Verilog File. You can find the Verilog File under www.johnloomis.org/digitallab/audio/audio3/audio3.html

Thanks for helping me.

in Deutsch:

Hallo,ich bin ein VHDL-Neuling und habe ein Problem mit der SP Programmierung. Wenn ich unter den Default Einstellung die JTAG Programmierung durchführe funktioniert alles. Die Beschreibung mit SP wird geladen, aber dann macht mein Board gar nix mehr. Wenn ich die pof-File in den EPCS16 geladen hab und danach wieder die sof-File lade, funktioniert auch diese nicht mehr. Is dies das slebe Problem mit dem Patch,oder bin ich einfach unfähig? Ich nutze das DE2 Board, Quartus II 9.1.

Zur Funktion:Ich möchte ein Verilog Programm in VHDL übersetzen, das Verilog-File ist unter: www.johnloomis.org/digitallab/audio/audio3/audio3.html zu finden. Die Dateien können auch bei mir geordert werden.;)

Vielen Dank für die Hilfe

The patch is available via MySupport or contact your FAE or wait for the next service pack / version

What do you mean with "SP" ?

ahh okay

Active Serial Programming is shortend to AS inside Altera documentation.

As you use Quartus 9.1 and try to setup AS you will need that patch.

the sof files generated by quartus 9.1 are okay but the stuff that generates epcs related files does not. or if you have access to a quartus version prior 9.1 (for example 9.0) then use a script to generated those files from sof and elf

I don't use V9.1 (for the said reasons, among others), but I understood, that only compressed AS files are affected.

To assure, that JTAG programming always takes precendence, you may want to disable the on-chip configuration controller, it's an otption of the Quartus Programmer tool.

@ FvM

The bug is not related on compression.

- perfrom a complete compile with 9.0 tools ... everything is fine

- perfrom the same complete compile with 9.1 ... does not start

- use files from 9.1 (sof & elf) and generate epcs related files on 9.0 tools... works

- use sof & elf from 9.0 and generate epcs files on 9.1 ... does not start

checkbox w/wo of compressed bitstream has no effect.

comandline option --compress w/wo has no effect

to sumarize ... 9.1 does not produce startable epcs related files out of sof & elf regardless where they were generated, but 9.0 does. workaround compile with 9.1 and generate epcs files with 9.0 via a comandline script (bash)

MySupport gave couple of ideas what to try but none worked.

only patch 063 helps.

Hi,

I think I am also facing a similar problem, and this discussion may be useful to me, but I have not understood the solution from this thread, can someone please explain it again.

I am using Altera Max II dev kit (MAXII-1270N), with Quartus 9.1 Build 222, Byteblaster II JTAG programmer. Even though all my projects compile succesfully, I am not able to program the device, the programmer inexplicably fails to load the .pof file. The problem is not with the JTAG programmer. When I try to program, I get JTAG ID, Silicon ID, then "Error: Operation Failed". No more information! Even the Functional tests supplied by Altera (to check all functions of the dev kit) fail to program the device. The "generate compressed bitstream" option is greyed out, ie unavailable for this device.

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Thanks

The "bug" (it is not officialy a bug as far as i know) is not related to Max-II devices.

A couple of projects here with the epm570 were compiled and programmed without any issue.

for cyclone devices, quartus 9.1 seems to produce a correct sof file but is unable to generate those files needed for epcs programming out of sof and elf files.

about your problem :

your are using a dev kit ? which one ?

if your target is powered up, open a command line window and run jtagconfig

now you should a info what jtag connection you have and what devices are reachable.

one board here displays these informations

1) USB-Blaster [USB-0]

020B60DD EP2C70

020A20DD EPM570

MaxII devices have no compressed bitstream, that is for fpga that were initiated via external components (like epcs) to reduce the bitstream and tehrefore the amount of data within the memory device that holds the image.

Many thanks to MSchmitt for the reply.

On the Quartus II Tcl console, I get

ByteBlasterII 
  020A30DD   EPM1270

which means the JTAG chain is working, since I have just one device connected and byteblaster can recognize it. I am using the Max II dev kit from Altera

http://www.altera.com/products/devkits/altera/kit-maxii-1270.html

and I am currently clueless about how to resolve the problem. I get a "Error: Operation failed" message whenever I try to program it. Interestingly, out of the four functional tests for the kit supplied by Altera (Functional_Test.pof, LowPowerDemo.pof, PowerUpDemo.pof, VendingMachineDemo.pof) ONLY LowPowerDemo.pof works and I am able to program the device with that file!

Since my situation is different from this thread, maybe I should start another one.

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Thanks again for the quick reply