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Altera_Forum's avatar
Altera_Forum
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18 years ago

MaxII Micro USB

The Terasic MaxII Micro Kit connects to a PC via the USB bus and an onboard FTDI chip. However, it is not clear how to access the USB from the CPLD. Is there any example code around showing ho...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Hello,

basically all access from PC to CPLD must go through JTAG, cause only dedicated MAX II JTAG pins are connected from EPM3128 USB Blaster CPLD. This means, that the communication must utilize the sld_hub and sld_virtual_jtag Megafunctions respectively the JTAG UART core.

As far as I see, Terasic has not yet included user code examples with the MAX II micro kit, only the ready-to-use ControlPanel demo. But the general virtual_jtag and JTAG UART examples should be applicable. I also noticed, that the ControlPanel communicates through the Quartus jtag_client.dll, which is undocumented to the public, as far as I know. Generally communication through Altera programming hardware isn't as open as desirable. For instance, I'm using the USB Blaster for low-level JTAG communication, accessing it directly from FTDI driver - cause the higher level is either undocumented or not conveniently accessible by user applications.

Best regards,

Frank