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wuhannus's avatar
wuhannus
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5 years ago

MAX10 FPGA develop kit download data from DDR3 through Triple speed ethernet IP

Hi who may concern, Recently we have used the MAX10 FPGA develop kit (Manufacture No: DK-DEV-10M50-A) to store the data on the board DDR3 memory which is around 1.5Gb. Now we are trying to download...
AR_A_Intel's avatar
AR_A_Intel
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5 years ago

Hello

Welcome to INTEL forum. Based on my understanding, for now we don’t have full system reference design that you are looking. We only have individual IP example design that’s generated from IP solution directly. For instance, DDR3 example design generated from DDR3 IP, TSE example design generated from TSE IP


  • wuhannus's avatar
    wuhannus
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    5 years ago

    Hi Rahman,

    Thanks for the information.

    Form my experience with DDR3 IP, it can be instantiated directly in MAX10 FPGA develop kit without license requirement.

    However, the TSE IP instantiation can only from qsys file and need the license requirement. From your opinion, is there any way to instantiate the TSE IP without license requirement?

    Thanks.