Forum Discussion
7 Replies
- JonWay_C_Intel
Frequent Contributor
Hi, I understand you question, let me check and get back to you.
May I know the reason for needing the device init time?
- 幸植村00
New Contributor
Hi,
Thank you for your reply.
I want to know the time when the MAX10 can be accessed from the outside.
I think it can be determined if you know the time until the operation starts after powering on the MAX10.
- JonWay_C_Intel
Frequent Contributor
Hi, thank you for your explanation.
You will need the tCD2UM (CONF_DONE to USER MODE). This will answer your question.
You can check the info in the datasheet (Table 55): https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/m10_datasheet.pdf
- 幸植村00
New Contributor
Hi,thank you for your reply.
The data sheet has shown the time to USER MODE since nSTATUS became Hi.
However, the time from POWER ON to nSTATUS becoming Hi is unknown.
Is the time from POWER ON to nSTATUS to Hi specified?
- JonWay_C_Intel
Frequent Contributor
For power on to nSTATUS = high, depends on your ramp up time of your supplies.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_config.pdf (Figure 11)
- 幸植村00
New Contributor
Is tRAMP defined from 0V to operating condition min?
How long does it take for nSTATUS to go high after tRAMP?
- JonWay_C_Intel
Frequent Contributor
Sorry for the delayed response.
Is tRAMP defined from 0V to operating condition min? JW: Yes for the last supply.
How long does it take for nSTATUS to go high after tRAMP? JW: nSTATUS assert after POR delay which is about 2.5ms. Search keyword POR delay in https://www.intel.com/content/www/us/en/programmable/documentation/myt1393986555723.html#myt1393987293874