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Altera_Forum's avatar
Altera_Forum
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17 years ago

LVDS on Stratix II GX... which pins?

I tried to select as data and clock input of a LVDS transmitter the pins corresponding to the jacks (J26... J49) or to the 20-pin debug header... but i can't fit the design in device because of Quar...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

My design about LVDS is based on stratix 2's device EP2S180F1020C5N ,as I have known ,the LVDS pins is on my device are only support on the row bank ,and the transmitted pins must be "TX" pins ,and the receiver pins must be "RX "pins , I think your question is more or less the same as what I have said , you'd better refer your handbook and ensure these.