Forum Discussion
SreekumarR_G_Intel
Frequent Contributor
6 years agoAre you asking state of the Max 10 FPGA IO at reset state ? if yes , answer to your questions is Tri-State.
Thank you,
Regards,
Sree
aWild8
New Contributor
6 years agoNot the logic levels at the reset state. but the logic levels on the pins right when I take the chip out of the box and power it on.
If the chip is in a reset state straight out of the box then this does answer the question.