New Contributor
New ContributorHere I found good information:
https://forums.intel.com/s/question/0D50P00003yyQXbSAM/how-to-let-fpga-get-access-to-hps-pins
using IoLoan 49 and 50 and setting HPS_UART_RX and TX to bidir, the project got synthesized.
No time to deal with quartus_hps.exe for QSPI programming for HPS
Regular ContributorHi,
Have you look through here? Not sure if it might help:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/cyclone-v/cv_54001.pdf#page=3433
The topic discussed on utilization unused HPS IOs as LoanIO, and directly driven by the FPGA thus it can be used as input, output, or bi-directional IO.
Is this issue same as your previous post? I noticed the you have made 2 posts regarding Loan IO.
Regards.
