Forum Discussion
Altera_Forum
Honored Contributor
17 years agoLED/Debouncing problems
Hello All, I am trying to test LED/debouncing logic for basic gates. Following is my code module ledtesting ( input clock, input A, input B, output C, output D, output E, out...
Altera_Forum
Honored Contributor
17 years agoplease correct syntax(I am vhdl poisoned)
always @ (posedge clk) begin slow_clk_d <= slow_clk; if(slow_clk == '1' and slow_clk_d == '0') debounce1[3:1] <= debounce1[2:0]; debounce1[0] <= A; out1 <= debounce1 == 4'hf ? 1'b1 : 1'b0; debounce2[3:1] <= debounce2[2:0]; debounce2[0] <= B; out2 <= debounce2 == 4'hf ? 1'b1 : 1'b0; end end