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Altera_Forum's avatar
Altera_Forum
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16 years ago

JTAG ID error

Hi, there I tried to implement Video-over-IP reference design on the Cyclone II dev kit. The Altera website said this reference design support Cyclone II series dev kit, and my one is EP2C35. B...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

I recompiled it. Yes, it should be a different .sof file. Now the hardware image works. However, when I download the software image .elf file on the board. It shows the following error:

There are no Nios II CPUs with debug modules available which match the values specified. Please check that your PLD is correctly configured, downloading a new SOF file if necessary.

And when I tried to follow the steps on the Nios II Development Kit Getting Started User Guide, the same problem occurs when I Downloading and run the Executable Code to the Nios Development Board. Could anyone give me a hint how to solve it? Since the downloading for the hardware image is ok, I assume the JTAG cable should be fine. Am I right?