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Altera_Forum's avatar
Altera_Forum
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16 years ago

Issues with Stratix IV E FPGA Dev Kit

We have a Stratix IV E FPGA Development Kit and recently started to use it. But we have several issues on the example designs included in the kit. First, its example designs are segregated i...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Well I certainly don't have the kit but I'll give my insight:

First - This is not uncommon. They often provide several test projects that excercise different parts of the board. Why do they do this. I think it's because they don't know what aspect of the board a customer will be interested in. Usually the more exciting reference designs become available later (your board is pretty new). For example, you might shortly see a ethernet reference design or something like that.

Second - Yeah that's annoying. I haven't seen that before. Clearly they had different people working on example projects for the board.

Third - Are the timing warnings given of any real consequence? Even I choose to ignore some hold or removal warnings if I see them as having no real impact on the design.

Fourth - I'd have to see that one for myself. Most likely the library paths for the restored project need to be checked and set up properly.

Jake