Forum Discussion
faruk74summy
New Contributor
1 year agoissue with the IO port input signal being overly sensitive
Hello, I am conducting ESD testing using the EPM1270GT144C4, but I’m encountering an issue with the IO port input signal being overly sensitive. Is there any hardware or software configuration meth...
FvM
Super Contributor
1 year agoHi,
the code defines no actual signal processing, the flags are only aliasis of the edge sensitive condition. Depending on the context, it causes a compilation error "signal not keeping state outside clock edge". If you want edge sensitive processing, define an actual flip-flop.
Regards
Frank