Forum Discussion
Is there a known good project i can use as a baseline for a PCIe project on a Cyclone 10GX development board?
- 6 years ago
Apologies for delay
We have to remove remove Board trace models.
Please remove below lines from .qsf file and run full compilation.
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
Checked with Quartus pro 19.1
Regards
Anand
Hi,
Please user reference design from below link
https://forums.intel.com/s/createarticlepage?articleid=a3g0P0000005QyOQAU&action=view
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_c5_pcie.pdf
https://forums.intel.com/s/createarticlepage?articleid=a3g0P0000005RSyQAM&action=view
Regards
Anand