Mingyuexin
Occasional Contributor
Occasional ContributorIs it possible to skip reconfiguration of transceiver when use displayport on Cyclone V SoC
Hi, I'm trying to design a video interface by using displayport on Cyclone V SoC device, I referred to the example design located (C:\intelFPGA\18.1\ip\altera\altera_dp\hw_demo\cv). In this example...
- Hi, transceiver reconfig interface is already hard coded as part of the feature in Intel FPGA Display Port IP. It's not something that can be disable. I am sorry but you can't skip it. Thanks. Regards, dlim
