IP for CAN

--- Quote Start ---

tri states are only available for outside connectivity not inside the fpga between modules.

a tristate is done by using an output buffer and controlling its output enable input.

--- Quote End ---

I don't know how Quartus actually synthesizes the sopc tristate bus. I believe this is not a true tristate.

If I connect it to another inside-fpga module it works perfectly.

I've already done it successfully both with OpenCore CAN module and with other IP cores exposing an AMI.

Cris