Forum Discussion
Internal Error when attempting to program Agilex 7 on Intel Development Kit
- 2 years ago
Hi Jingyang,
Thank you very much for your help with this. The data points you have provided have helped greatly in debugging and verification of programming procedure.
This case has transitioned over to IPS support. I/We can close this ticket and accept solution.
Thanks,
Brandon
Hi Jingyang,
Thank you for providing this valuable data point.
As for the SDRAM calibration, I disabled the EMIF calibration from with Platform Designer, so I understand why this fails.
I am not so concerned with being unable to boot Linux, since I am not even able to complete the flashing of the bitstream like you were able to do.
I do have another test design, which does not use the HPS, only a standalone P-tile PCIe MCDMA IP, and that design compiles, programs, and works just fine (reading the VID/PID of the PCIe IP on the DK from a host Linux machine over the PCIe interface). So I think my board is "working" just not when I include the HPS system.
At the point I am fairly convinced there is an issue with my DK, since I have already verified all clocks and voltages are present and stable, and you have been able to successfully verify my design and bitstream.
Before I work through an RMA of this unit, are there perhaps any other suggestions you may have?
I tried slowing JTAG programming speed down to 6 MHz from 24 MHz and this did not show any improvement. Same results with USB-Blaster JTAG and on-board USB JTAG programmer also.
Thanks for your time,
Brandon