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Aidin-P2D's avatar
Aidin-P2D
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Interfacing Nios II and HMC on Cyclone vGT

Hi everyone,

Hope all well and I appreciate if you take a look at this and see if you can help us. We are using Cyclone V GT Dev board to test DDR3 HMC controller. We used 32 bit SGDMA to write into DDR3 and used NIOS II to read back from every available address to confirm the data. it is working fine with no issues. NIOS II code running on on-chip memory.

Then we removed on-chip memory and tried running simple hello world. I should also confirm that SGDMAs removed from design to simplify the design. however, when we are trying to start the NIOS, the error message pops out saying “Connected system ID hash not found on target at expected base address.” I know when this happens , there might be something wrong with system. However, we are yet unable to find the issue.

I should say that HMC core passes the calibration margins. Please see attached. DDR3 using single 32 bit bidirectional port avl_0 and both NIOS data master and instruction master connected to it. exception and reset vectors correctly set and NIOS alongside other peripherals running at 50MHz. any help appreciated. I should also mention that, when we change the ip core to soft memory controller system works fine.

Looking forward to your valuable comments. Some pictures below

Regards,

Aidin.

32 Replies

  • KellyJialin_Goh's avatar
    KellyJialin_Goh
    Icon for Frequent Contributor rankFrequent Contributor

    Hi Aidin,

    So is everything all good? Is there any further support needed from my end?


    Thanks.


    Best,

    Kelly



  • Aidin-P2D's avatar
    Aidin-P2D
    Icon for Occasional Contributor rankOccasional Contributor

    Hi Kelly,

    one last thing: as I mentioned, on CV GT Reference manual states DDR3A is 256MB. However, Nios and platform designer see the Memory size of 512MB? am I missing a point? All row and Column address are correct from data sheet.

    Regards,

    Aidin.

  • KellyJialin_Goh's avatar
    KellyJialin_Goh
    Icon for Frequent Contributor rankFrequent Contributor

    Hi Aidin,

    The NIOS II on platform designer should be no issue as you have all your project settings done.

    The only down side and limitation is HMC does not support NIOS II with large memory bytes, and soft memory controller is able to support larger memory.


    Are you able to proceed with Soft Memory Controller for your project and are you happy with the workaround?


    Hope to hear from you.


    Thank you.


    Best,

    Kelly


  • Aidin-P2D's avatar
    Aidin-P2D
    Icon for Occasional Contributor rankOccasional Contributor

    Thanks Kelly

    I think HMC is not supporting NIOS in any size of memory as we have tried various sizes. Hopefully, this will be updated in future to make things easier.

    for Now, we will create a on chip memory to work with and if needed will use soft memory

    Thanks for help

    Regards,

    Aidin.

  • KellyJialin_Goh's avatar
    KellyJialin_Goh
    Icon for Frequent Contributor rankFrequent Contributor

    HI,

    I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.

    p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.

    Thank you.


    Regards,

    Kelly Jialin, GOH