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LoveZJT's avatar
LoveZJT
Icon for New Contributor rankNew Contributor
2 years ago

Intel Stratix 10 MX FPGA HBM issue

We find that the HBM on Intel Stratix 10 MX FPGA fails to calibrate successfully. After providing clock and releasing reset, the port local_cal_success is low and local_cal_fail is high. We also use ...
Board Debug
AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hello,


Thanks for sharing your debugging steps in details.


Do you have any tool that can be used to check the signal on board?

Usually we will check the clock is stable and voltage is stable or not.

If you can perform the same, kindly share the results of your finding.


Other than generated example design and development kit design, you can find some reference design in FPGA Design Store.

Link: https://www.intel.com/content/www/us/en/support/programmable/support-resources/design-examples/design-store.html?q=hbm&s=Relevancy


What is your device ordering code?


Regards,

Adzim