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LoveZJT
New Contributor
New ContributorIntel Stratix 10 MX FPGA HBM issue
We find that the HBM on Intel Stratix 10 MX FPGA fails to calibrate successfully. After providing clock and releasing reset, the port local_cal_success is low and local_cal_fail is high. We also use ...
LoveZJTNew Contributor
New ContributorWe use the BTS of design files on Intel website, and it keeps running 32h as shown below.
In these files, there is two example designs, hbm_top and hbm_bottom. In the project, we only integrate a additional signal tap to watch local_cal_success and local_cal_fail, but the result shows that local_cal_success is low and local_cal_fail is high.
