Intel FPGA P-Tile Avalon Memory Mapped (Avalon-MM) IP not able to write and read from onchip RAM

I have created a design with 3 x 64-bit non-prefetchable BAR, BAR0-1, has 32k RAM (32K space) BAR2-3 has 32K RAM (64K space) BAR 4-5 has 32K RAM (64K space) used Quartus pro 19.4 for implementat...