Forum Discussion
SengKok_L_Intel
Regular Contributor
5 years agoHi,
Do you see the link-up problem if you program the FPGA first, and then perform a reboot of the host PC?
You may also need to capture the signals below to understand what is going on during the link training:
currentspeed[1..0]
ltssmstate[4..0]
lane_act[3..0]
Regards -SK