Forum Discussion

CircuitMaster's avatar
CircuitMaster
Icon for New Contributor rankNew Contributor
2 years ago

Inquiries regarding 10M08 Evaluation Kit FPGA (How to use inner clock&error message)

  1) I've created a histogram circuit with the 10M08 Evaluation Kit FPGA. I want to test it, but I can't find detailed instructions on how to do it. If there's any resource available, please l...
Fpga Devkit
ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
2 years ago

Hi,

For Question 2: Try to replace with a new In-System Sources & Probes IP (ISSP) in platform designer (QSYS) check screenshot below.

Thanks,

Sheng

  • CircuitMaster's avatar
    CircuitMaster
    Icon for New Contributor rankNew Contributor
    2 years ago

    Can you tell me about where I can access download the new ISSP??

    • sstrell's avatar
      sstrell
      Icon for Super Contributor rankSuper Contributor
      2 years ago

      You're looking in the Quartus IP Catalog, not the Platform Designer IP Catalog, though it should be available in both. Bad installation of Quartus perhaps?