In-System Memory Content Editor

Intel Stratix 10 GX FPGA Development Kit L-Tile

1SG280LU2F50E2VG / 1SG280LU3F50E3VGS1 (User guide is not clear)

I have configured a ROM to "Allow In-System Memory Content Editor to capture and update content independently of the system clock" with 'instance ID' of this RAM set to 0001.

Once synthesized, I am able to program the Stratix 10 on the development board and connect to the ROM using the In-System Memory Content Editor.

When I read data from the ROM, the tool reads the same data for all addresses.

Attempts with other memories in the design have the same problem.