Forum Discussion
KLohr
Occasional Contributor
Occasional ContributorI'm having problems using signalTap with virtual jtag.
I've ported a design using the virtual jtag IP which creates a virtual Uart on a max 10 device. I've done simpler designs that work with signaltap, but this one doesn't. As soon as I enable communica...
KennyT_altera
Super Contributor
Super ContributorHi,
Did you try the design in https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_virtualjtag.pdf page 28? Did your design have a timing closed?
Also, there are example with the terasic on the virtual uart, you can refer to here https://nhiphanlogic.wordpress.com/2014/07/05/virtual-uart-for-the-terasic-de0-nano/
Thanks,
Best regards,
Kenny Tan
