Forum Discussion

LisaXu's avatar
LisaXu
Icon for New Contributor rankNew Contributor
2 years ago
Solved

Idaville LCC I2C layout trace length

Dear Intel Team: we checked the document <Idaville LCC Platform Design Guide (PDG)>, it shows I2C/SMBUS PCB trace length should be kept in below 30 inch. In my opinion, we ususally use ~3pF/inch f...
Board Debug
  • AqidAyman_Altera's avatar
    AqidAyman_Altera
    2 years ago

    Hi Lisa,


    I have got input from the internal team as below:


    All these recommendations in the tables in section 13.1.2 were put together using simulations by our Signal Integrity Team.


    I checked for example the guidelines provided in the Whitley PDG (doc# 574174). Whitley is the platform for ICX-SP, which has a different PCH than ICX-D. Checking table 6-36 in the Whitley PDG I see similar number to the table 13-1 in the Idaville PDG. It seems that even with a different PCH they arrived at similar conclusions.


    You also can run your own simulations and if you think the board is able to handle longer traces, they can do it, but Intel can’t offer support if they deviate from our recommendations.


    Regards,

    Aqid


AqidAyman_Altera's avatar
AqidAyman_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi Lisa,


Can you share which page it is? I may need to consult the internal team who owned the documentation.


Regards,

Aqid


LisaXu's avatar
LisaXu
Icon for New Contributor rankNew Contributor
2 years ago

Hi Aqid:

Item 13.1.2 on Page 567 & 568 of document <Idaville LCC Platform Design Guide(PDG) Revision 2.4 November 2023>.

Best Regards

Lisa