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Zhilang_X_Intel's avatar
Zhilang_X_Intel
Icon for New Contributor rankNew Contributor
7 years ago

I would like to build a connection between my master device and max v, so I program an i2c interface logic to max v which I download from opencores. But I can read from my master device but can't write correctly to the MAX V cpld.

I would like to build a connection between my master device and max v, so I program an i2c interface logic to max v which I download from opencores. But I can read from my master device but can't wri...
Zhilang_X_Intel's avatar
Zhilang_X_Intel
Icon for New Contributor rankNew Contributor
7 years ago

Thanks for your advice. But the an486 example set the MAX FPGA to a master not a slave, and I just set my MAX V to a I2C slave. So could you please help me review my I2C_to_GPIO_modify file?

EBERLAZARE_I_Intel's avatar
EBERLAZARE_I_Intel
Icon for Regular Contributor rankRegular Contributor
7 years ago

Hi,

Are you facing the write issue using the code entirely from opencores? I am unsure if the code are supposedly targeted for MAX V device.

I am not really familiar with verilog, but you probably want to get the register address code to work first since the an494 example is already working.

Regards.

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