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JGeor12's avatar
JGeor12
Icon for New Contributor rankNew Contributor
6 years ago

I am working with the cyclone V device.Currently i am processing the lvds signals.

The major problem is, i cannot route the input lvds signal between the input to the LVDS_RX IP and input to the lcd externally connected at the same time.Either as input to the lcd or IP is possible....
SreekumarR_G_Intel's avatar
SreekumarR_G_Intel
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

Can you attach the design ? There is a way you to attach the design privtaely in the fourm if you think design is confidential.

or attcah the smillar design only with IP and interface part and replicate the error.

JGeor12's avatar
JGeor12
Icon for New Contributor rankNew Contributor
6 years ago

The attached file is the verilog file.I have highlighted the part where routing issues occured in the code.While running it i got the below problems.

Error (170143): Final fitting attempt was unsuccessful

Info (170138): Failed to route the following 6 signal(s)

Info (170139): Signal "lvdse_in[0]~input"

Info (170139): Signal "lvdse_in[4]~input"

Info (170139): Signal "lvdse_in[1]~input"

Info (170139): Signal "lvdse_in[5]~input"

Info (170139): Signal "lvdse_in[2]~input"

Info (170139): Signal "lvdse_in[6]~input"