Forum Discussion

DylanD's avatar
DylanD
Icon for New Contributor rankNew Contributor
3 years ago

HPS LOAN IO Pins Not Outputting Expected Signals

Despite making changes inside Qsys in regards to switching desired unused pins to LOANIO from regular GPIO, exporting the new HPS LOAN IO signals, and generating new preloader files, I still cannot g...
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
3 years ago

Which device? How are you making the connections? What do your settings look like in the HPS parameter editor? I think more details are needed here.

DylanD's avatar
DylanD
Icon for New Contributor rankNew Contributor
3 years ago

I agree and thanks for the comment.

Device: Cyclone V

How I am making the connections within design:

Top level pin being targeted, this signal is mapped to one of the physical FPGA pins:

The exported LOANIO20 signal within Qsys block is being mapped directly to top level pin as per documentation:

The exported hps_loan_io_oe for LOANIO20 is set to a '1' to enable it being an output and i'm trying to output a '0' to the top level pin:

The settings for my HPS parameter editor are as follows:

These NAND pins are set to Unused to allow for LOANIO accessibility per documentation

LOANIO Signals within Qsys are being exported

I am unsure if there is more information within QSYS or the HPS parameter editor that may be useful for me to include in order to solve this issue, please let me know!