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JSieg4's avatar
JSieg4
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6 years ago

How to tri-state the configuration pins after configuration with CycloneV?

Hello, We work with a CycloneV in active serial configuration mode. The EPCS config flash is connected to the FPGA and also in parallel to an external microcontroller. The idea is to update the FPG...
JSieg4's avatar
JSieg4
Icon for New Contributor rankNew Contributor
6 years ago

Hello

Thank you for your efforts.

I checked the obtion in the .qsf file (see picture below).

We did not record any waveforms. We just tried to set the pins we wanted to tri-state to a 2.5V potential after configuration.

If they were tri-state we should measure 2.5 V at the point shown in the picture below. But for two of the pins we measure 0V so they seem to

be driven to GND and not tri-state.

regards

ShafiqY_Intel's avatar
ShafiqY_Intel
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

Hello,

The output will be high or low depending upon its output logic level.

I don't think you can just simply measuring using above circuit to determine whether pins are tri-state or not.

The more practical way to determine is include ASMI Parallel IP (I or II) in your design. Then, if the DCLK, nCSO and DATA pins are tri-stated, these pins will prevent ASMI Parallel IP from working correctly in user mode.

I hope this will help.

Cheers.