Forum Discussion
Nathan_R_Intel
Contributor
6 years agoHie,
My apologies for the delayed first response, as I missed your question. There were few PCIe DMA cases assigned to me, that I missed this one.
For Cyclone 10 is using PCIe with DMA, our recommendation is to use the Intel Arria10/Cyclone 10 Avalon-MM DMA for PCIe Example Design.
Once the FPGA is configured, the Physical Layer will link up and followed up by enumeration. The Example Design uses a On-Chip Memory IP-core which stores the DMA data. For the FPGA, you will need to use the Descriptor Controller to manage the Read and Write DMA.
The steps to generate this Example Design and its usage is covered in the following user guide:
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_a10_pcie_avmm_dma.pdf
Please let me know if you understand my response above and you have further questions.
Regards,
Nathan