"Info: Start compiling process
Info: Args: -tool modelsim -language verilog -tool_path G:/intelFPGA_pro/22.1/questa_fse/win64 -directory G:/Tests/cntr_32_sync -rtl_only
Info: *******************************************************************
Info: Running Quartus Prime Shell
Info: Version 22.1.0 Build 174 03/30/2022 SC Pro Edition
Info: Copyright (C) 2022 Intel Corporation. All rights reserved.
Info: Your use of Intel Corporation's design tools, logic functions
Info: and other software and tools, and any partner logic
Info: functions, and any output files from any of the foregoing
Info: (including device programming or simulation files), and any
Info: associated documentation or information are expressly subject
Info: to the terms and conditions of the Intel Program License
Info: Subscription Agreement, the Intel Quartus Prime License Agreement,
Info: the Intel FPGA IP License Agreement, or other applicable license
Info: agreement, including, without limitation, that your use is for
Info: the sole purpose of programming logic devices manufactured by
Info: Intel and sold by Intel or its authorized distributors. Please
Info: refer to the applicable agreement for further details, at
Info: https://fpgasoftware.intel.com/eula.
Info: Processing started: Wed Jul 6 22:04:26 2022
Info: System process ID: 12532
Info: Command: quartus_sh --simlib_comp -tool modelsim -language verilog -tool_path G:/intelFPGA_pro/22.1/questa_fse/win64 -directory G:/Tests/cntr_32_sync -rtl_only
Info: Quartus(args): -tool modelsim -language verilog -tool_path G:/intelFPGA_pro/22.1/questa_fse/win64 -directory G:/Tests/cntr_32_sync -rtl_only
Info: Changing the current directory to output directory G:/Tests/cntr_32_sync ..
Info: Using Path G:/intelFPGA_pro/22.1/questa_fse/win64 that was set in EDA Simulation Library Compiler Options
Info: Generating commands to compile library altera_ver ...
Info: Generating commands to compile library lpm_ver ...
Info: Generating commands to compile library sgate_ver ...
Info: Generating commands to compile library altera_mf_ver ...
Info: Generating commands to compile library altera_lnsim_ver ...
Info: Executing command file containing library compilation commands
Info: Unable to checkout a license. Make sure your license file environment variable (SALT_LICENSE_SERVER, MGLS_LICENSE_FILE, LM_LICENSE_FILE)
Info: is set correctly and then run 'lmutil lmdiag' to diagnose the problem.
Info: Unable to checkout a license. Vsim is closing.
Error: ** Error: Invalid license environment. Application closing.
Error: Compilation was NOT successful. 1 errors, 0 warnings"
Any idea to fix this failure and move forward with simulation.
Thanks,
Ali