How to Read/Write L4 Peripheral Slave Bus on S10 SX Device

Hello Hans_1st,

I tried "s10_soc_devkit_ghrd_es.tar.gz" on Stratix 10 SoC Devkit ES, and have confirmed to be able to access HPS periphrals such as UART0.

After booting U-boot, I also executed the following commands.

S10 SoC Bridge Configuration

https://rocketboards.org/foswiki/Documentation/S10SoCBridgeConfiguration

Next, we can access to HPS via “JTAG to Avalon Master Bridge Cores” below in jtg_mst.qsys.

https://www.intel.co.jp/content/www/jp/ja/programmable/documentation/sfo14007879529322.html#iga1401396548170

Then, the system-console which is located in intelFPGA_pro/19.1/syscon/bin is launched. This is a debugging tool for “JTAG to Avalon Master Bridge Cores”. See below.

Using System Console

https://rocketboards.org/foswiki/Documentation/GSRDQuartusProgrammer

Type a command below to show all path name of JTAG port in the FPGA system.

The 4^th path is for accessing F2H bridge.

% get_service_paths master

{/devices/1SX280LN2S(2|1)|1SX280LN3S1|..@2#1-9.3.2#Stratix 10L SoC Dev Kit/(link)/JTAG/(110:132 v1 #0)/phy_0/master}

{/devices/1SX280LN2S(2|1)|1SX280LN3S1|..@2#1-9.3.2#Stratix 10L SoC Dev Kit/(link)/JTAG/(110:132 v1 #1)/phy_1/master}

{/devices/1SX280LN2S(2|1)|1SX280LN3S1|..@2#1-9.3.2#Stratix 10L SoC Dev Kit/(link)/JTAG/(110:132 v1 #2)/phy_2/master}

{/devices/1SX280LN2S(2|1)|1SX280LN3S1|..@2#1-9.3.2#Stratix 10L SoC Dev Kit/(link)/JTAG/(110:132 v1 #3)/phy_3/master} {/devices/1SX280LN2S(2|1)|1SX280LN3S1|..@2#1-9.3.2#Stratix 10L SoC Dev Kit/(link)/JTAG/(110:132 v1 #4)/phy_4/master}

Type a command below to set path to ‘m’ variable.

% set m [ lindex [ get_service_paths master] 4]

/devices/1SX280LN2S(2|1)|1SX280LN3S1|..@2#1-9.3.2#Stratix 10L SoC Dev Kit/(link)/JTAG/(110:132 v1 #4)/phy_4/master

Type a command below to open a port

% open_service master $m

Type a command below to read UART registers. You can see UART0.cpr, ucv and ctr which are read-only values.

% master_read_32 $m 0xffc02000 64

0x00000046 0x00000000 0x000000c1 0x00000003 0x00000003 0x00000060 0x00000010 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000046 0x00000046 0x00000046 0x00000046 0x00000046 0x00000046 0x00000046 0x00000046 0x00000046 0x00000046 0x00000046 0x00000046 0x00000046 0x00000046 0x00000046 0x00000046 0x00000000 0x00000000 0x00000000 0x00000006 0x00000000 0x00000000 0x00000000 0x00000001 0x00000000 0x00000000 0x00000001 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00000000 0x00083f32 0x3331352a 0x44570110

Type a command below to close the port

% close_service master $m

Best regards,

Yoshiaki Saito