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Contributor

2 years ago

How to fully control the Avalon MM bridge by HPS baremetal?

Hi, I'm using CycloneVsoc baremetal HPS with FPGA. I have multi channel from HPS to FPGA, they are using H2F bridge or LWH2F bridge(AXI bridge) through AvalonMM bridge. I've read the Avalon Bridge...

Fpga Devkit

aikeu

Regular Contributor

2 years ago

Hi CAlex,

There is a msgdma design example which may help for understanding, can check the application c code under the software folder on the project file:

https://community.intel.com/t5/FPGA-Wiki/MSGDMA-design-example/ta-p/735335

More information regarding the MSGDMA is from the embedded peripheral user guide:

https://www.intel.com/content/www/us/en/docs/programmable/683130/21-2/introduction.html

Thanks.

Regards,

Aik Eu

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How to fully control the Avalon MM bridge by HPS baremetal?

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