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Tomoya3's avatar
Tomoya3
Icon for New Contributor rankNew Contributor
2 years ago

How to assign memory bits?

I have created a TrueDualPortMemory in VerilogHDL. I can't assign reg to memorybit. reg [15:0]mem_a16_h[7:0]; I used Assignment Editor but it did not work. How to assign it? FPGA:10M04SCU Qua...
Fpga Devkit
ShengN_altera's avatar
ShengN_altera
Icon for Super Contributor rankSuper Contributor
2 years ago

Hi,

Check this link https://www.intel.com/content/www/us/en/programmable/quartushelp/17.0/logicops/logicops/def_auto_ram_recognition.htm#:~:text=A%20logic%20option%20that%20allows,the%20functionality%20of%20the%20design.

This option must be assigned to a design entity or it is ignored check screenshot below:

Btw, this option is turned on by default as global assignment in Assignments -> Settings -> Advanced Settings (Synthesis)

Thanks,

Best Regards,

Sheng