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Altera_Forum
Honored Contributor
16 years agoHow to 32bit DDR2 in CycloneIII development kit?
Hi, I just got my Cyclone III development kit. However, it seems the examples does not have all features demonstrated. In all examples, only one DDR2 chip (16bit) is accessed even there...
Altera_Forum
Honored Contributor
16 years agoHi,
I did more test trying to use the other memory chips not used in reference design (for example, U25A in DDR2_BOTTOM). I switched DQ width back to 16 and make the following pin assignment modifications. mem_dm[1..0] <= ddr_dm[3..2] mem_dq[15..0] <= ddr_dq[31..16] mem_dqs[1..0] <= ddr_dqs[3..2] The same error (shown in earlier message) will show up. Once I switched back to the original chip (U26A) by assigning mem_dm[1..0] <= ddr_dm[1..0] mem_dq[15..0] <= ddr_dq[15..0] mem_dqs[1..0] <= ddr_dqs[1..0], then every is fine. What is problem when memory chip U25A is used? Thanks, gl888