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RBens's avatar
RBens
Icon for New Contributor rankNew Contributor
7 years ago

How do I restore/reset Arria 10 SoC FPGA development boards that are not accessible via JTAG anymore?

I work for Intel and am submitting this case on my customers behalf. I do not have physical possession of the board and need a contact that my customers can send the boards to for repair. Regards, ...
YuanLi_S_Intel's avatar
YuanLi_S_Intel
Icon for Regular Contributor rankRegular Contributor
7 years ago

Hi RBens,

Just would like to clarify that the JTAG server programming is having problem on the board but the on-board USB Blaster is working fine?

Speaking about board reflashed/restored/reset, do you want to program MAX V with default hardware programming file? If it so, you may find the programming file available in Arria 10 SX SoC Package Installer. It is located in directory “..\arria10_10as066n3f40_soc_v15.1.2\examples\max5\PRD”.

Thank You.

Regards,

YL

JET60200's avatar
JET60200
Icon for Contributor rankContributor
6 years ago

Hello ,

​

Is it possile to get the the source code of system max V ( only binary system_max5.pof exists in Dev Kit), which uses to control the power sequence for the Arria 10 SoC Dev Kit ?

We're working on a customer design with A10Soc , and they want to use MAX V as well on their customer board.

Any way to get ? Thanks a lot