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OLevy1's avatar
OLevy1
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

High Speed Intel Reed Solomon Simulation Model Submodules are being generated in VHDL although i select Verilog Simulation Model

CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
6 years ago
can you try using the Modelsim* Intel® FPGA Starter Edition which come with Quartus installation and free.