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Altera_Forum
Honored Contributor
Honored ContributorHelp required on Ethernet with FPGA
Hi .. I'm a student and I'm working on a project which involves a design that has NiOS II processor, DDRSDRAM, SSRAM, a custom Ethernet MAC and other components and I've to run an applicat...
Altera_ForumHonored Contributor
Honored ContributorHi,
I am working on NEEK Board. Does my ethernet port(PHY) need clock to send and receive packets or is already connected by default.
