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Altera_Forum
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16 years ago

Help required on Ethernet with FPGA

Hi .. I'm a student and I'm working on a project which involves a design that has NiOS II processor, DDRSDRAM, SSRAM, a custom Ethernet MAC and other components and I've to run an applicat...
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Altera_Forum
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16 years ago

Hi jakobjones,

I had compiled the design from http://www.alteraforum.com/forum/showthread.php?t=3665 which did not show me any errors. But after compilation when i look into the pin planner i have ceratin signals marked unknown in the direction field.

E.g

Node Name : top_hsmc_clk

Direction : unknown

Location : Pin_A1.

Similarly there are a lot number of signals having direction unknown.

Are these signals required for me to communicate with the HSMC daughter board?

Will my ethernet port work with these signals unassigned?

With these signals marked unknown will i be able to send and receive an ethernet packet?

At present i'm interested in only configuring the PHY to send and receive data.

Thanks & Regards,

Renu.