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AHart2's avatar
AHart2
Icon for New Contributor rankNew Contributor
6 years ago

Hello, is there an know problem with the 1000Base-X autonegotiation in the PCS_PMA unit of the triple speed ethernet mac ? Best regards, Andre

The design is compiled with Quartus 16.0 for CYCLONE V SOC with transceivers I follow the PCS initialization scheme suggested in the TSE user manual and have already tried the workaround suggested...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Also, don't confused auto-negotiation PHY mode and MAC mode with actual TSE MAC design block.

there are two auto-negotiation setting - PHY mode and MAC mode

PHY mode = the speed and duplex mode of Intel FPGA and external device will be resolved based on the value set in the dev_ability register. Meaning PHY mode is for advertise the link speed and duplex mode to the link partner

MAC mode is wait for the link speed and duplex mode from link partner and then resolve based on the link_partner ability register.

Thanks.