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SKacc's avatar
SKacc
Icon for New Contributor rankNew Contributor
6 years ago

General I/O clarifications

Hi Please clarify the following queries 1. Does DIFFIO_TX_[B,T][#:#]p or DIFFIO_TX_[B,T][#:#]p acts as input? 2. Does DIFFIO_RX_[B,T][#:#]p or DIFFIO_RX_[B,T][#:#]n acts as output? 3. Does DIFFIO...
AnandRaj_S_Intel's avatar
AnandRaj_S_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

  1. CLK-P/N is Dedicated positive and negative clock input pins. if you use it as a ordinary/output pin it will not use dedicated rooting.

Also, Since CLK-P/N are dedicated clock input pins, does it impact if I use it as normal differential IO?

No.

Reagrds

Anand