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Altera_Forum
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16 years ago

FPGA example to wirte data to SSRAM/SDRAM in Cyclone III starter kit?

I want to use VHDL/verilog to write some simple data to the SSRAM/ DDR SDRAM in Cyclone III starter kit, then use control plane to read the data out. Anyone has VHDL/verilog examples? just a s...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Here's an example of a function to test the off-chip mem. It won't completely test the memory, but I think it is sufficient for what you're doing. MEM_TEST_VAL is whatever you want it to be as long as it's not bigger than 32 bits. Have fun.

int ddr2_mem_test()

{

int i;

int error_count;

int readbyte;

error_count = 0;

// Write to the memory needed.

for(i=0; i<(MEM_SPAN); i++) {

IOWR_32DIRECT(DDR2_SDRAM_BASE, i, MEM_TEST_VAL);

}

// Read back and verify data.

for(i=0; i<(MEM_SPAN); i++) {

readbyte = IORD_32DIRECT(DDR2_SDRAM_BASE, i);

if (readbyte != MEM_TEST_VAL)

{

error_count++;

}

}

return error_count;

}