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Annu's avatar
Annu
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1 year ago

FPGA Connection to Processor eSPI Interface

How do we connect the processor with eSPI interface to Cyclone 10 LP FPGA. And what are preset settings to be made in Processor and FPGA for establishing the connection. The IP, Intel eSPI slave sla...
Fpga Devkit
tehjingy_Altera's avatar
tehjingy_Altera
Icon for Regular Contributor rankRegular Contributor
1 year ago

Hi Annu


Any follow up question on this case?


Regards

Jingyang, Teh


  • Annu's avatar
    Annu
    Icon for New Contributor rankNew Contributor
    1 year ago

    Your Logs show the virtual wire usage. I wanted to use the commands PUT_IORD_SHORT and PUT_IOWR_SHORT. I have tried configuring the channel zero and tried the same. I was not able to see the output in response while using PUT_IORD_SHORT. Please suggest any resolution