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Annu's avatar
Annu
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1 year ago

FPGA Connection to Processor eSPI Interface

How do we connect the processor with eSPI interface to Cyclone 10 LP FPGA. And what are preset settings to be made in Processor and FPGA for establishing the connection. The IP, Intel eSPI slave sla...
Fpga Devkit
tehjingy_Altera's avatar
tehjingy_Altera
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1 year ago

Hi


Sorry we do not have an example designe for eSPI at the moment.


Regards

Jingyang, Teh


  • Annu's avatar
    Annu
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    1 year ago

    If you could share the testbenches and waveforms for the Intel FPGA slave it would be helpfull

  • Annu's avatar
    Annu
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    1 year ago

    Hi

    We are utilizing the cyclone 10 LP FPGA and SMARC module conga SA7 to communicate the register mapping via ESPI logic. So could you please share the testbenches and waveforms for the ESPI Slave IP

  • Annu's avatar
    Annu
    Icon for New Contributor rankNew Contributor
    1 year ago

    We are utilizing the cyclone 10 LP FPGA and SMARC module conga SA7 to communicate the register mapping via ESPI logic. So could you please share the testbenches and waveforms for the ESPI Slave IP.It would be very helpful for me if you could provide a testbench for read and write access from / to a peripheral channel.