Forum Discussion
4 Replies
- EBERLAZARE_I_Intel
Regular Contributor
Hi Andreas,
Firstly, have you tried using latest Quartus version for Cyclone V which would be the Quartus std 18.1 and SoC EDS 18.1?
Did you see any changes using the latest version?
- aurec2
New Contributor
Hi el.ing,
many thanks for your reply. I have been using the entire toolchain (i.e. Quartus, bsp-editor, arm-ds5 builder, etc.) of generation 16.1, because I was led to believe that newer versions of the toolchain dont fully support cyclone V devices (notably in terms of the pre-loader and boot-loader generation ). I re-installed version16.1, but the header is still missing. According to the documentation the msgdma should be available on version 16.1.
Allow me to depict my goal using the msgdma (Memory-Mapped to Streaming)
An FPGA-Application is supposed to consume data from the msgdma-streaming source. Problem: On the HPS I cannot "dump" the data into the msgdma, since I cannot use the necessary functions (alt_msgdma_open,alt_msgdma_construct_standard_mm_to_st_descriptor, alt_msgdma_descriptor_sync_transfer) due the missing header file.
How can I use the msgdma for cyclone V devices? I would be very grateful for a further tip.
Thanks
Andreas
- EBERLAZARE_I_Intel
Regular Contributor
Hi,
I advice that you try with latest version of Quartus to test out if the header will be installed.
You can refer to these examples designs on mSGDMA, unfortunately we do not have one for bare metal:
https://rocketboards.org/foswiki/Documentation/DatamoverDesignExample
https://forums.intel.com/s/createarticlepage?articleid=a3g0P0000005QubQAE&action=view&language=en_US
- aurec2
New Contributor
Hi el.ign
many thanks for your answer and the links. I will give it a try.
Andreas