Hi,
Just to keep you posted—I’ve conducted a series of tests using both FFT IP v19.1 and the Unified FFT IP. It appears that the output from FFT IP v19.1 in inverse FFT mode is not as expected. However, when using the Unified FFT IP in inverse FFT mode, the output behaves as expected.
Based on this observation, as a workaround, you may proceed with your modification using the Variable Size FFT Intel FPGA IP. I’ll also share this feedback with Engineering for further investigation.
Apologies for any inconvenience caused, and thank you for your understanding.
Best regards,
Chee Pin