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binfu1's avatar
binfu1
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11 months ago

FFT Intel FPGA IP

When I use FFT Intel FPGA IP (version 19.1), the simulation results of fft is correct (compared with python calculate results). Then I assert inverse signal to calculate ifft, the results is incorrec...
binfu1's avatar
binfu1
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10 months ago

Hi,

Thanks for your reply. I need to change FFT mode (forward and inverse FFT) in the runtime, so the FFT Intel FPGA IP is my best choice. Although I can modify the Variable Size FFT Intel FPGA IP to realize the same function, I want to make sure the problem mentioned above caused by the IP itself, instead of improper use of mine.

Best regards.

CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
10 months ago

Hi,

Thanks for your clarification. I’ll continue investigating the behavior of the FFT IP v19.1 and will keep you updated on any findings.

In the meantime, I understand that the Variable Size FFT Intel FPGA IP allows for a static configuration of Forward/Inverse mode during IP setup. Could you kindly elaborate on how you modified the IP to enable runtime switching between FFT modes?

Appreciate your insights. Thank you.

Best regards,
Chee Pin

  • binfu1's avatar
    binfu1
    Icon for New Contributor rankNew Contributor
    10 months ago

    Hi，

    The compute flow of inverse FFT contain forward FFT, so we can realize inverse FFT based on Variable Size FFT Intel FPGA IP (forward mode) by adding missing calculation steps.

    Best regards.